Configure
Concrete can be customized using Configuration
s:
You can overwrite individual options as kwargs to the compile
method:
Or you can combine both:
Additional kwargs to compile
functions take higher precedence. So if you set the option in both configuration
and compile
methods, the value in the compile
method will be used.
Options
show_graph: Optional[bool] = None
Print computation graph during compilation.
True
means always print,False
means never print,None
means print depending on verbose configuration below.
show_mlir: Optional[bool] = None
Print MLIR during compilation.
True
means always print,False
means never print,None
means print depending on verbose configuration below.
show_optimizer: Optional[bool] = None
Print optimizer output during compilation.
True
means always print,False
means never print,None
means print depending on verbose configuration below.
show_statistics: Optional[bool] = None
Print circuit statistics during compilation.
True
means always print,False
means never print,None
means print depending on verbose configuration below.
verbose: bool = False
Print details related to compilation.
dump_artifacts_on_unexpected_failures: bool = True
Export debugging artifacts automatically on compilation failures.
auto_adjust_rounders: bool = False
Adjust rounders automatically.
p_error: Optional[float] = None
Error probability for individual table lookups. If set, all table lookups will have the probability of a non-exact result smaller than the set value. See Exactness to learn more.
global_p_error: Optional[float] = None
Global error probability for the whole circuit. If set, the whole circuit will have the probability of a non-exact result smaller than the set value. See Exactness to learn more.
single_precision: bool = False
Use single precision for the whole circuit.
parameter_selection_strategy: (fhe.ParameterSelectionStrategy) = fhe.ParameterSelectionStrategy.MULTI
Set how cryptographic parameters are selected.
jit: bool = False
Enable JIT compilation.
loop_parallelize: bool = True
Enable loop parallelization in the compiler.
dataflow_parallelize: bool = False
Enable dataflow parallelization in the compiler.
auto_parallelize: bool = False
Enable auto parallelization in the compiler.
enable_unsafe_features: bool = False
Enable unsafe features.
use_insecure_key_cache: bool = False (Unsafe)
Use the insecure key cache.
insecure_key_cache_location: Optional[Union[Path, str]] = None
Location of insecure key cache.
show_progress: bool = False,
Display a progress bar during circuit execution
progress_title: str = "",
Title of the progress bar
progress_tag: Union[bool, int] = False,
How many nested tag elements to display with the progress bar.
True
means all tag elements andFalse
disables the display.2
will displayelmt1.elmt2
fhe_simulation: bool = False
Enable FHE simulation. Can be enabled later using
circuit.enable_fhe_simulation()
.
fhe_execution: bool = True
Enable FHE execution. Can be enabled later using
circuit.enable_fhe_execution()
.
compiler_debug_mode: bool = False,
Enable/disable debug mode of the compiler. This can show a lot of information, including passes and pattern rewrites.
compiler_verbose_mode: bool = False,
Enable/disable verbose mode of the compiler. This mainly show logs from the compiler, and is less verbose than the debug mode.
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